11:00 am - 12:00 pm, June 7 (Tuesday)

Venue

Zoom Meeting ID: 935 0160 5170

Passcode: 123456

Host

Prof. Xun LIU

Speaker

Prof. Chenchang Zhan

Abstract

The design of power management integrated circuits(PMICs) has become more-than-ever challenging, primarily due to theproliferation of advanced portable and wearable electronics in IoT. On onehand, the performances are required to be high, such as fast responses withgood efficiency and low stand-by power. On the other hand, the cost is requiredto be effective, such as compact chip area and small number of externalcomponents. To address these demands, novel PMIC modules are needed. In thistalk, selected works developed by our research group will be sketchilypresented, including fully integrated LDOs, ultra-low-power voltage references,switching converters, as well as wireless power receivers. Each of themachieves unique features to fit for different application scenarios. A fewongoing works will be also outlined.

Biography

Chenchang Zhan received the B.Sc., M.Sc. (from Fudan) and Ph.D. (from HKUST) degree in 2004, 2007 and 2011, respectively. He was a Post-doc research associate with HKUST from 2011-2012, and a Senior Engineer with Qualcomm, San Diego, CA, from 2012-2014. He then joined SUSTech, Shenzhen, China as an Assistant Professor in Aug. 2014, and was promoted to an Associate Professor in Dec. 2019.

Dr. Zhan works on the analysis and design of analog, mixed-signal and power management integrated circuits and systems for a variety of applications. Up to date, he published 1 book, >85 SCI/EI/IEEE papers, and was granted with 10 China and 6 US patents. He received the Best Paper Award in IEEE ISIC’2009 and EDSSC'2018, the Best Student Paper Award in IEEE EDSSC’2010 and ISCAS’2011, and the 2018 SUSTech Young Faculty Research Award. He served as a member of the Review Committee for IEEE APCCAS’2014, a TPC member for IEEE ICTA’2018-2022, and a reviewer for many reputational journals and conferences. He is a Senior Member of IEEE.